IRQ Strobe

The IRQ strobe does not work like a normal register, in the fact that it does not allow normal read/writes. Essentially, setting a bit in these registers results in the bit to actually be cleared. When the respective event, it will then SET the bit. These registers are then treated as a queue, requesting IRQs until the queue is empty. This is effective because it allows users to only tamper with the values that it wants, and not worry about events occuring while the CPU is executing an opcode, rather than branch to IRQ. There are 32 bits, but not all are used. I've not determined the effective IRQs for all the bits, but these are the ones I know.

The last 4 cart IRQs that are left unaccounted for. They are hardware irqs (in order of cart location): 1D, 1E, 1F, 14. As far as the other bits... I belive most are used, The ones left blank I'm not sure about.

For information reguarding the cartridge IRQ mapping, consult Game Rom for details. Once I've figured them out, I will post them here.

Register	Bit	Description
0x27	7	Cart IRQ 1
0x27	6	Cart IRQ 2
0x27	5	Cart IRQ 3
0x27	4	Cart IRQ 4
0x27	3	Cart IRQ 5
0x27	2	Cart IRQ 6
0x27	1	Cart IRQ 7
0x27	0	Cart IRQ 8
0x28	7
0x28	6	Cart IRQ 9
0x28	5	Cart IRQ 10
0x28	4	Cart IRQ 11
0x28	3	Cart IRQ 12
0x28	2	Unknown
0x28	1
0x28	0
0x29	7	Cart IRQ 15
0x29	6	Cart IRQ 16
0x29	5	Cart IRQ 17
0x29	4	Cart IRQ 18
0x29	3	Cart IRQ 19
0x29	2	Cart IRQ 20
0x29	1	Cart IRQ 21
0x29	0	Cart IRQ 22
0x2A	7	Cart IRQ 13
0x2A	6	Cart IRQ 14
0x2A	5
0x2A	4
0x2A	3
0x2A	2
0x2A	1
0x2A	0

Basicly, to wait for vblank, the programmer should do:

mov [LCD_STAT], 0x80
waitVBL: test [LCD_STAT], 0x80
jz waitVBL

Return to Hardware Registers or Pokemon Mini specifications.